library ieee; use ieee.std_logic_1164.all; use ieee.std_logic_signed.all; entity ntsc_color_composite2 is port ( v_sync : in std_logic; h_sync : in std_logic; BRG : in std_logic_vector(2 downto 0); V_out : out std_logic_vector(4 downto 0); clock_in : in std_logic); end ntsc_color_composite2; architecture rtl of ntsc_color_composite2 is -- register for internal counter signal dot_clock : std_logic_vector(9 downto 0); -- register for internal counter signal burst_clock : std_logic_vector(1 downto 0); -- register for tmp signal signal Y_signal : std_logic_vector(4 downto 0); signal C_signal : std_logic_vector(4 downto 0); begin -- reset dot clock counter process (h_sync,clock_in) begin if (h_sync = '0') then dot_clock <= "0000000000"; elsif (clock_in'event and clock_in = '1') then dot_clock <= dot_clock + 1; end if; end process; -- reset burst clock counter process (clock_in) begin if (clock_in'event and clock_in = '1') then burst_clock <= burst_clock + 1; end if; end process; -- calculate Y signal process (v_sync,h_sync,BRG,dot_clock) begin if (v_sync = '0' or h_sync ='0') then Y_signal <= "00000"; --sync level -- display color dot after 9.2us-4.7us -- ( (9.2-4.7)/(1/14.3) =64clock @ 14.3mhz) elsif (dot_clock > 64 or dot_clock < -1) then case BRG is when "000"=> --black Y_signal <= "00110"; when "001"=> --blue Y_signal <= "01000"; when "010"=> --red Y_signal <= "01010"; when "011"=> --magenta Y_signal <= "01100"; when "100"=> --green Y_signal <= "01110"; when "101"=> --cyan Y_signal <= "10000"; when "110"=> --yellow Y_signal <= "10010"; when "111"=> --white Y_signal <= "10100"; when others => Y_signal <= "XXXXX"; end case; else Y_signal <= "00110"; --black level end if; end process; -- calculate C signal process (BRG,dot_clock,burst_clock) begin -- output burst signal from 19 cycle to 19+9 cycle -- (omit 4.7us=67clk) if (dot_clock >= (19*4-67) and dot_clock <= ((19+9)*4)-1-67) then -- output color burst signal case burst_clock is when "00"=> --0 deg. V C_signal <= "00000"; -- 0IRE when "01"=> --90 deg. U C_signal <= "11101"; -- -20IRE when "10"=> --180 deg. -V C_signal <= "00000"; -- 0IRE when "11"=> --270 deg. -U C_signal <= "00011"; --20IRE when others => C_signal <= "XXXXX"; end case; -- display color dot after 9.2us-4.7us -- ( (9.2-4.7)/(1/14.3) =64clock @ 14.3mhz) elsif (dot_clock > 64 or dot_clock < -1) then -- output color sub carrier signal case BRG is when "000"=> --black C_signal <= "00000"; when "001"=> --blue case burst_clock is when "00"=> --0 deg. C_signal <= "11111"; -- V when "01"=> --90 deg. C_signal <= "00110"; -- U when "10"=> --180 deg. C_signal <= "00001"; -- -V when "11"=> --270 deg. C_signal <= "11010"; -- -U when others => C_signal <= "XXXXX"; end case; when "010"=> --red case burst_clock is when "00"=> --0 deg. C_signal <= "01001"; -- V when "01"=> --90 deg. C_signal <= "11110"; -- U when "10"=> --180 deg. C_signal <= "10111"; -- -V when "11"=> --270 deg. C_signal <= "00010"; -- -U when others => C_signal <= "XXXXX"; end case; when "011"=> --magenta case burst_clock is when "00"=> --0 deg. C_signal <= "00111"; -- V when "01"=> --90 deg. C_signal <= "00100"; -- U when "10"=> --180 deg. C_signal <= "11001"; -- -V when "11"=> --270 deg. C_signal <= "11100"; -- -U when others => C_signal <= "XXXXX"; end case; when "100"=> --green case burst_clock is when "00"=> --0 deg. C_signal <= "11001"; -- V when "01"=> --90 deg. C_signal <= "11100"; -- U when "10"=> --180 deg. C_signal <= "00111"; -- -V when "11"=> --270 deg. C_signal <= "00100"; -- -U when others => C_signal <= "XXXXX"; end case; when "101"=> --cyan case burst_clock is when "00"=> --0 deg. C_signal <= "10111"; -- V when "01"=> --90 deg. C_signal <= "00010"; -- U when "10"=> --180 deg. C_signal <= "01001"; -- -V when "11"=> --270 deg. C_signal <= "11110"; -- -U when others => C_signal <= "XXXXX"; end case; when "110"=> --yellow case burst_clock is when "00"=> --0 deg. C_signal <= "00001"; -- V when "01"=> --90 deg. C_signal <= "11010"; -- U when "10"=> --180 deg. C_signal <= "11111"; -- -V when "11"=> --270 deg. C_signal <= "00110"; -- -U when others => C_signal <= "XXXXX"; end case; when "111"=> --white C_signal <= "00000"; when others => C_signal <= "XXXXX"; end case; else C_signal <= "00000"; end if; end process; -- calculate V-out process (C_signal,Y_signal) begin V_out <= Y_signal + C_signal; end process; end rtl;